00001 #ifndef ARCH_PIRQ_ROUTING_H 00002 #define ARCH_PIRQ_ROUTING_H 00003 00004 #include <stdint.h> 00005 00006 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24)) 00007 #define PIRQ_VERSION 0x0100 00008 00009 struct irq_info { 00010 uint8_t bus, devfn; /* Bus, device and function */ 00011 struct { 00012 uint8_t link; /* IRQ line ID, chipset dependent, 0=not routed */ 00013 uint16_t bitmap; /* Available IRQs */ 00014 } __attribute__((packed)) irq[4]; 00015 uint8_t slot; /* Slot number, 0=onboard */ 00016 uint8_t rfu; 00017 } __attribute__((packed)); 00018 00019 #if defined(IRQ_SLOT_COUNT) 00020 #define IRQ_SLOTS_COUNT IRQ_SLOT_COUNT 00021 #elif (__GNUC__ < 3) 00022 #define IRQ_SLOTS_COUNT 1 00023 #else 00024 #define IRQ_SLOTS_COUNT 00025 #endif 00026 00027 struct irq_routing_table { 00028 uint32_t signature; /* PIRQ_SIGNATURE should be here */ 00029 uint16_t version; /* PIRQ_VERSION */ 00030 uint16_t size; /* Table size in bytes */ 00031 uint8_t rtr_bus, rtr_devfn; /* Where the interrupt router lies */ 00032 uint16_t exclusive_irqs; /* IRQs devoted exclusively to PCI usage */ 00033 uint16_t rtr_vendor, rtr_device; /* Vendor and device ID of interrupt router */ 00034 uint32_t miniport_data; /* Crap */ 00035 uint8_t rfu[11]; 00036 uint8_t checksum; /* Modulo 256 checksum must give zero */ 00037 struct irq_info slots[IRQ_SLOTS_COUNT]; 00038 } __attribute__((packed)); 00039 00040 extern const struct irq_routing_table intel_irq_routing_table; 00041 00042 #if HAVE_PIRQ_TABLE==1 00043 unsigned long copy_pirq_routing_table(unsigned long start); 00044 unsigned long write_pirq_routing_table(unsigned long start); 00045 #if PIRQ_ROUTE==1 00046 void pirq_routing_irqs(unsigned long start); 00047 void pirq_assign_irqs(const unsigned char pIntAtoD[4]); 00048 #else 00049 #define pirq_routing_irqs(start) {} 00050 #endif 00051 #else 00052 #define copy_pirq_routing_table(start) (start) 00053 #define write_pirq_routing_table(start) (start) 00054 #endif 00055 00056 #endif /* ARCH_PIRQ_ROUTING_H */
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