romcc_io.h File Reference

#include <stdint.h>

Include dependency graph for romcc_io.h:

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Defines

#define ARCH_ROMCC_IO_H   1

#define PCI_ADDR(SEGBUS, DEV, FN, WHERE)

#define PCI_DEV(SEGBUS, DEV, FN)

#define PCI_ID(VENDOR_ID, DEVICE_ID)   ((((DEVICE_ID) & 0xFFFF) << 16) | ((VENDOR_ID) & 0xFFFF))

#define PNP_DEV(PORT, FUNC)   (((PORT) << 8) | (FUNC))

#define PCI_DEV_INVALID   (0xffffffffU)

Functions

static __attribute__ ((always_inline)) uint8_t read8(unsigned long addr)

Define Documentation

#define ARCH_ROMCC_IO_H 1

Definition at line 2 of file romcc_io.h.

#define PCI_ADDR	(	SEGBUS,
		DEV,
		FN,
		WHERE	)

Value:

( \
        (((SEGBUS) & 0xFFF) << 20) | \
        (((DEV) & 0x1F) << 15) | \
        (((FN) & 0x07) << 12) | \
        ((WHERE) & 0xFFF))

#define PCI_DEV	(	SEGBUS,
		DEV,
		FN	)

Value:

( \
        (((SEGBUS) & 0xFFF) << 20) | \
        (((DEV) & 0x1F) << 15) | \
        (((FN)  & 0x07) << 12))

Referenced by ac97_io_enable(), amd64_main(), bios_reset_detected(), check_cmos_failed(), ck804_early_clear_port(), ck804_early_set_port(), ck804_early_setup(), ck804_early_setup_x(), ck804_enable_rom(), cold_reset_detected(), cpu_init_detected(), distinguish_cpu_resets(), do_k8_init_and_stop_secondaries(), do_ram_command(), dump_pci_devices(), dump_pci_devices_on_bus(), early_ich7_init(), enable_cf9_x(), enable_fid_change_on_sb(), enable_rs690_dev8(), enable_smbus(), enumerate_ht_chain(), fill_mem_ctrl(), for_each_ap(), get_core_num_in_bsp(), get_dram_base_mask(), get_ht_c_index(), get_htic_bit(), get_nodes(), get_sblk(), hard_reset(), ht_collapse_previous_enumeration(), ht_setup_chains(), ht_setup_chains_x(), ht_setup_chainx(), i3100_enable_superio(), i3100_halt_tco_timer(), i82801xx_halt_tco_timer(), i945_detect_chipset(), i945_setup_bars(), i945_setup_dmi_rcrb(), i945_setup_egress_port(), i945_setup_pci_express_x16(), i945_setup_root_complex_topology(), i945_silicon_revision(), ich7_enable_lpc(), ich7_setup_dmi_rcrb(), ich7_setup_pci_express(), is_core0_started(), k8_optimization(), k8t890_early_setup_ht(), main(), mb_gpio_init(), mcp55_early_clear_port(), mcp55_early_pcie_setup(), mcp55_early_set_port(), mcp55_early_setup(), mcp55_early_setup_x(), mcp55_enable_rom(), mcp55_enable_usbdebug_direct(), memory_initialized(), node_link_to_bus(), optimize_link_read_pointer(), optimize_link_read_pointers_chain(), other_reset_detected(), pci_locate_device(), pci_locate_device_on_bus(), print_pci_devices(), print_pci_devices_on_bus(), raminit_main(), real_main(), real_start_other_core(), reset_tests(), route_dram_accesses(), rs690_early_setup(), rs690_htinit(), sb600_enable_usbdebug_direct(), sdram_capabilities_dual_channel(), sdram_capabilities_enhanced_addressing_xor(), sdram_capabilities_interleave(), sdram_capabilities_max_supported_memory_frequency(), sdram_capabilities_MEM4G_disable(), sdram_capabilities_two_dimms_per_channel(), sdram_detect_errors(), sdram_enable(), sdram_initialize(), sdram_power_management(), sdram_program_graphics_frequency(), sdram_program_memory_frequency(), sdram_program_row_boundaries(), sdram_set_registers(), sdram_set_spd_registers(), set_bios_reset(), set_bsp_node_CHtExtNodeCfgEn(), set_debug_port(), set_dram_buffer_strength(), set_ht_link_buffer_count(), set_ht_link_buffer_counts_chain(), set_htic_bit(), sio_setup(), sis966_early_pcie_setup(), sis966_enable_usbdebug_direct(), smi_handler(), soft_reset(), soft_reset_x(), spd_set_dram_size(), spd_set_dram_timing(), and spd_set_drt_attributes().

#define PCI_DEV_INVALID (0xffffffffU)

Referenced by disable_esb6300_watchdog(), disable_ich5_watchdog(), disable_jarell_frb3(), enable_mainboard_devices(), enable_rom_decode(), enable_smbus(), enable_vt8231_serial(), full_reset(), get_sb600_revision(), ich5_watchdog_on(), main(), mch_reset(), pci_locate_device(), pci_locate_device_on_bus(), sb600_devices_por_init(), vt8237_sb_enable_fid_vid(), and vt82c686_enable_serial().

#define PCI_ID	(	VENDOR_ID,
		DEVICE_ID		)	((((DEVICE_ID) & 0xFFFF) << 16) \| ((VENDOR_ID) & 0xFFFF))

#define PNP_DEV	(	PORT,
		FUNC		)	(((PORT) << 8) \| (FUNC))

Referenced by early_superio_config_w83627thg().

Function Documentation

static __attribute__ ( (always_inline) ) [inline, static]

Definition at line 7 of file romcc_io.h.


Defines
#define	ARCH_ROMCC_IO_H 1
#define	PCI_ADDR(SEGBUS, DEV, FN, WHERE)
#define	PCI_DEV(SEGBUS, DEV, FN)
#define	PCI_ID(VENDOR_ID, DEVICE_ID) ((((DEVICE_ID) & 0xFFFF) << 16) \| ((VENDOR_ID) & 0xFFFF))
#define	PNP_DEV(PORT, FUNC) (((PORT) << 8) \| (FUNC))
#define	PCI_DEV_INVALID (0xffffffffU)
Functions
static	__attribute__ ((always_inline)) uint8_t read8(unsigned long addr)