00001 #ifndef ARCH_CPU_H
00002 #define ARCH_CPU_H
00003
00004
00005
00006
00007 #define X86_EFLAGS_CF 0x00000001
00008 #define X86_EFLAGS_PF 0x00000004
00009 #define X86_EFLAGS_AF 0x00000010
00010 #define X86_EFLAGS_ZF 0x00000040
00011 #define X86_EFLAGS_SF 0x00000080
00012 #define X86_EFLAGS_TF 0x00000100
00013 #define X86_EFLAGS_IF 0x00000200
00014 #define X86_EFLAGS_DF 0x00000400
00015 #define X86_EFLAGS_OF 0x00000800
00016 #define X86_EFLAGS_IOPL 0x00003000
00017 #define X86_EFLAGS_NT 0x00004000
00018 #define X86_EFLAGS_RF 0x00010000
00019 #define X86_EFLAGS_VM 0x00020000
00020 #define X86_EFLAGS_AC 0x00040000
00021 #define X86_EFLAGS_VIF 0x00080000
00022 #define X86_EFLAGS_VIP 0x00100000
00023 #define X86_EFLAGS_ID 0x00200000
00024
00025 struct cpuid_result {
00026 uint32_t eax;
00027 uint32_t ebx;
00028 uint32_t ecx;
00029 uint32_t edx;
00030 };
00031
00032
00033
00034 static inline struct cpuid_result cpuid(int op)
00035 {
00036 struct cpuid_result result;
00037 asm volatile(
00038 "cpuid"
00039 : "=a" (result.eax),
00040 "=b" (result.ebx),
00041 "=c" (result.ecx),
00042 "=d" (result.edx)
00043 : "0" (op));
00044 return result;
00045 }
00046
00047
00048
00049
00050
00051 static inline unsigned int cpuid_eax(unsigned int op)
00052 {
00053 unsigned int eax;
00054
00055 __asm__("cpuid"
00056 : "=a" (eax)
00057 : "0" (op)
00058 : "ebx", "ecx", "edx");
00059 return eax;
00060 }
00061 static inline unsigned int cpuid_ebx(unsigned int op)
00062 {
00063 unsigned int eax, ebx;
00064
00065 __asm__("cpuid"
00066 : "=a" (eax), "=b" (ebx)
00067 : "0" (op)
00068 : "ecx", "edx" );
00069 return ebx;
00070 }
00071 static inline unsigned int cpuid_ecx(unsigned int op)
00072 {
00073 unsigned int eax, ecx;
00074
00075 __asm__("cpuid"
00076 : "=a" (eax), "=c" (ecx)
00077 : "0" (op)
00078 : "ebx", "edx" );
00079 return ecx;
00080 }
00081 static inline unsigned int cpuid_edx(unsigned int op)
00082 {
00083 unsigned int eax, edx;
00084
00085 __asm__("cpuid"
00086 : "=a" (eax), "=d" (edx)
00087 : "0" (op)
00088 : "ebx", "ecx");
00089 return edx;
00090 }
00091
00092
00093
00094 #define X86_VENDOR_INVALID 0
00095 #define X86_VENDOR_INTEL 1
00096 #define X86_VENDOR_CYRIX 2
00097 #define X86_VENDOR_AMD 3
00098 #define X86_VENDOR_UMC 4
00099 #define X86_VENDOR_NEXGEN 5
00100 #define X86_VENDOR_CENTAUR 6
00101 #define X86_VENDOR_RISE 7
00102 #define X86_VENDOR_TRANSMETA 8
00103 #define X86_VENDOR_NSC 9
00104 #define X86_VENDOR_SIS 10
00105 #define X86_VENDOR_UNKNOWN 0xff
00106
00107 #if !defined( __ROMCC__ ) && defined( __GNUC__)
00108 #include <device/device.h>
00109
00110
00111 struct cpu_device_id {
00112 unsigned vendor;
00113 unsigned device;
00114 };
00115 struct cpu_driver {
00116 struct device_operations *ops;
00117 struct cpu_device_id *id_table;
00118 };
00119
00120 struct cpu_info {
00121 device_t cpu;
00122 unsigned long index;
00123 };
00124
00125 static inline struct cpu_info *cpu_info(void)
00126 {
00127 struct cpu_info *ci;
00128 __asm__("andl %%esp,%0; "
00129 "orl %2, %0 "
00130 :"=r" (ci)
00131 : "0" (~(STACK_SIZE - 1)),
00132 "r" (STACK_SIZE - sizeof(struct cpu_info))
00133 );
00134 return ci;
00135 }
00136
00137 static inline unsigned long cpu_index(void)
00138 {
00139 struct cpu_info *ci;
00140 ci = cpu_info();
00141 return ci->index;
00142 }
00143
00144
00145 struct cpuinfo_x86 {
00146 uint8_t x86;
00147 uint8_t x86_vendor;
00148 uint8_t x86_model;
00149 uint8_t x86_mask;
00150 };
00151
00152 static void inline get_fms(struct cpuinfo_x86 *c, uint32_t tfms)
00153 {
00154 c->x86 = (tfms >> 8) & 0xf;
00155 c->x86_model = (tfms >> 4) & 0xf;
00156 c->x86_mask = tfms & 0xf;
00157 if (c->x86 == 0xf)
00158 c->x86 += (tfms >> 20) & 0xff;
00159 if (c->x86 >= 0x6)
00160 c->x86_model += ((tfms >> 16) & 0xF) << 4;
00161
00162 }
00163 #endif
00164
00165 #endif